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ADC integriert mit TIM-als Trigger und DMA zum Datenübertragen

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This commit is contained in:
Carsten Keller 2024-06-09 17:57:44 +02:00
parent 7541837b45
commit a143fba47d
Signed by: carsten
GPG Key ID: DF06343A3A9B8868
14 changed files with 7010 additions and 161 deletions
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10
.cproject
View File

@ -94,6 +94,7 @@
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.otherflags.2122396564" name="Other flags" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.otherflags" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="-Wl,--no-warn-rwx-segments"/>
</option>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.systemcalls.343584520" name="System calls" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.systemcalls" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.systemcalls.value.minimalimplementation" valueType="enumerated"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.input.1329045540" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
@ -414,7 +415,14 @@
<project id="Elektronische_Last.null.1943098670" name="Elektronische_Last"/>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
<storageModule moduleId="refreshScope"/>
<storageModule moduleId="refreshScope" versionNumber="2">
<configuration configurationName="Debug">
<resource resourceType="PROJECT" workspacePath="/Elektronische_Last"/>
</configuration>
<configuration configurationName="Release">
<resource resourceType="PROJECT" workspacePath="/Elektronische_Last"/>
</configuration>
</storageModule>
<storageModule moduleId="scannerConfiguration">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1583925056;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1583925056.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.396831531;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.831480056">

2
.gitignore vendored
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@ -1,5 +1,7 @@
Debug
Elektronische_Last Debug.launch
.settings/
Core/Inc/main.h
Core/Inc/stm32g0xx_it.h
Core/Src/
Core/Startup/

4
.mxproject
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@ -1,8 +1,8 @@
[PreviousLibFiles]
LibFiles=Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_gpio.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_exti.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_system.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_adc.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dma.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dmamux.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_bus.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_cortex.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_rcc.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_utils.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_pwr.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dac.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_lpuart.h;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_gpio.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_exti.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_adc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dma.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_rcc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_utils.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dac.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_lpuart.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_pwr.c;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_gpio.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_exti.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_system.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_adc.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dma.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dmamux.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_bus.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_cortex.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_rcc.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_utils.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_pwr.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dac.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_lpuart.h;Drivers\CMSIS\Device\ST\STM32G0xx\Include\stm32g071xx.h;Drivers\CMSIS\Device\ST\STM32G0xx\Include\stm32g0xx.h;Drivers\CMSIS\Device\ST\STM32G0xx\Include\system_stm32g0xx.h;Drivers\CMSIS\Device\ST\STM32G0xx\Source\Templates\system_stm32g0xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
LibFiles=Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_gpio.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_exti.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_system.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_adc.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dma.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dmamux.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_bus.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_cortex.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_rcc.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_utils.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_pwr.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dac.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_lpuart.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_tim.h;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_gpio.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_exti.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_adc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dma.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_rcc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_utils.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dac.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_lpuart.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_pwr.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_tim.c;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_gpio.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_exti.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_system.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_adc.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dma.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dmamux.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_bus.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_cortex.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_rcc.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_utils.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_pwr.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_dac.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_lpuart.h;Drivers\STM32G0xx_HAL_Driver\Inc\stm32g0xx_ll_tim.h;Drivers\CMSIS\Device\ST\STM32G0xx\Include\stm32g071xx.h;Drivers\CMSIS\Device\ST\STM32G0xx\Include\stm32g0xx.h;Drivers\CMSIS\Device\ST\STM32G0xx\Include\system_stm32g0xx.h;Drivers\CMSIS\Device\ST\STM32G0xx\Source\Templates\system_stm32g0xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
[PreviousUsedCubeIDEFiles]
SourceFiles=Core\Src\main.c;Core\Src\stm32g0xx_it.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_gpio.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_exti.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_adc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dma.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_rcc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_utils.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dac.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_lpuart.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_pwr.c;Drivers\CMSIS\Device\ST\STM32G0xx\Source\Templates\system_stm32g0xx.c;Core\Src\system_stm32g0xx.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_gpio.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_exti.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_adc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dma.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_rcc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_utils.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dac.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_lpuart.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_pwr.c;Drivers\CMSIS\Device\ST\STM32G0xx\Source\Templates\system_stm32g0xx.c;Core\Src\system_stm32g0xx.c;;;
SourceFiles=Core\Src\main.c;Core\Src\stm32g0xx_it.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_gpio.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_exti.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_adc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dma.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_rcc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_utils.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dac.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_lpuart.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_pwr.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_tim.c;Drivers\CMSIS\Device\ST\STM32G0xx\Source\Templates\system_stm32g0xx.c;Core\Src\system_stm32g0xx.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_gpio.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_exti.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_adc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dma.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_rcc.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_utils.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_dac.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_lpuart.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_pwr.c;Drivers\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_tim.c;Drivers\CMSIS\Device\ST\STM32G0xx\Source\Templates\system_stm32g0xx.c;Core\Src\system_stm32g0xx.c;;;
HeaderPath=Drivers\STM32G0xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32G0xx\Include;Drivers\CMSIS\Include;Core\Inc;
CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:48000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:1;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G071xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:48000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:1;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;

84
Core/Inc/main.h
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@ -1,84 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32g0xx_ll_adc.h"
#include "stm32g0xx_ll_dac.h"
#include "stm32g0xx_ll_lpuart.h"
#include "stm32g0xx_ll_rcc.h"
#include "stm32g0xx_ll_bus.h"
#include "stm32g0xx_ll_system.h"
#include "stm32g0xx_ll_exti.h"
#include "stm32g0xx_ll_cortex.h"
#include "stm32g0xx_ll_utils.h"
#include "stm32g0xx_ll_pwr.h"
#include "stm32g0xx_ll_dma.h"
#include "stm32g0xx_ll_gpio.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */

63
Core/Inc/stm32g0xx_it.h
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@ -1,63 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g0xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32G0xx_IT_H
#define __STM32G0xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void SVC_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USART3_4_LPUART1_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32G0xx_IT_H */

5275
Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_tim.h Normal file
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File diff suppressed because it is too large Load Diff

1369
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_tim.c Normal file
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File diff suppressed because it is too large Load Diff

46
Elektronische_Last.ioc
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@ -1,9 +1,10 @@
#MicroXplorer Configuration settings - do not modify
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_0
ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_1
ADC1.EOCSelection=ADC_EOC_SEQ_CONV
ADC1.DMAContinuousRequests=ENABLE
ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
ADC1.ExternalTrigConv=ADC_EXTERNALTRIG_T1_TRGO2
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag,master,SelectedChannel,EOCSelection,SamplingTimeCommon1,SamplingTimeCommon2,ExternalTrigConv,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,NbrOfConversion
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag,master,SelectedChannel,EOCSelection,SamplingTimeCommon1,SamplingTimeCommon2,ExternalTrigConv,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,NbrOfConversion,DMAContinuousRequests
ADC1.NbrOfConversion=2
ADC1.NbrOfConversionFlag=1
ADC1.Rank-0\#ChannelRegularConversion=1
@ -22,6 +23,25 @@ DAC1.DAC_Channel-DAC_OUT2=DAC_CHANNEL_2
DAC1.DAC_Trigger-DAC_OUT1=DAC_TRIGGER_NONE
DAC1.DAC_Trigger-DAC_OUT2=DAC_TRIGGER_NONE
DAC1.IPParameters=DAC_Channel-DAC_OUT1,DAC_Channel-DAC_OUT2,DAC_Trigger-DAC_OUT1,DAC_Trigger-DAC_OUT2
Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.ADC1.0.EventEnable=DISABLE
Dma.ADC1.0.Instance=DMA1_Channel1
Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
Dma.ADC1.0.Mode=DMA_CIRCULAR
Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.ADC1.0.Priority=DMA_PRIORITY_HIGH
Dma.ADC1.0.RequestNumber=1
Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.ADC1.0.SignalID=NONE
Dma.ADC1.0.SyncEnable=DISABLE
Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.ADC1.0.SyncRequestNumber=1
Dma.ADC1.0.SyncSignalID=NONE
Dma.Request0=ADC1
Dma.RequestsNb=1
File.Version=6
GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
@ -33,16 +53,19 @@ Mcu.CPN=STM32G071KBT3
Mcu.Family=STM32G0
Mcu.IP0=ADC1
Mcu.IP1=DAC1
Mcu.IP2=LPUART1
Mcu.IP3=NVIC
Mcu.IP4=RCC
Mcu.IP5=SYS
Mcu.IPNb=6
Mcu.IP2=DMA
Mcu.IP3=LPUART1
Mcu.IP4=NVIC
Mcu.IP5=RCC
Mcu.IP6=SYS
Mcu.IP7=TIM1
Mcu.IPNb=8
Mcu.Name=STM32G071K(6-8-B)Tx
Mcu.Package=LQFP32
Mcu.Pin0=PC14-OSC32_IN (PC14)
Mcu.Pin1=PA0
Mcu.Pin10=VP_SYS_VS_Systick
Mcu.Pin11=VP_TIM1_VS_ClockSourceINT
Mcu.Pin2=PA1
Mcu.Pin3=PA2
Mcu.Pin4=PA3
@ -51,12 +74,13 @@ Mcu.Pin6=PA5
Mcu.Pin7=PC6
Mcu.Pin8=PA13
Mcu.Pin9=PA14-BOOT0
Mcu.PinsNb=11
Mcu.PinsNb=12
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32G071KBTx
MxCube.Version=6.8.1
MxDb.Version=DB.6.0.81
NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@ -111,7 +135,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_ADC1_Init-ADC1-false-LL-true,4-MX_DAC1_Init-DAC1-false-LL-true,5-MX_LPUART1_UART_Init-LPUART1-false-LL-true,6-MX_TIM2_Init-TIM2-false-HAL-true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_DMA_Init-DMA-false-LL-true,4-MX_ADC1_Init-ADC1-false-LL-true,5-MX_DAC1_Init-DAC1-false-LL-true,6-MX_LPUART1_UART_Init-LPUART1-false-LL-true,7-MX_TIM1_Init-TIM1-false-LL-true
RCC.ADCFreq_Value=64000000
RCC.AHBFreq_Value=64000000
RCC.APBFreq_Value=64000000
@ -152,7 +176,11 @@ SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1
SH.COMP_DAC11_group.ConfNb=1
SH.COMP_DAC12_group.0=DAC1_OUT2,DAC_OUT2
SH.COMP_DAC12_group.ConfNb=1
TIM1.IPParameters=TIM_MasterOutputTrigger2
TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_UPDATE
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
VP_TIM1_VS_ClockSourceINT.Mode=Internal
VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
board=custom
isbadioc=false

199
Source/ADC.cpp Normal file
View File

@ -0,0 +1,199 @@
/*
* ADC.cpp
*
* Created on: Jul 1, 2023
* Author: Carst
*/
#include <cstdint>
#include <stm32g0xx_ll_adc.h>
#include <stm32g0xx_ll_dma.h>
#include <stm32g0xx_ll_gpio.h>
#include <stm32g0xx_ll_tim.h>
#include "ADC.hpp"
#include <stdio.h>
typedef struct
{
std::uint16_t current;
std::uint16_t temperature;
}ADC_Samples_t;
static ADC_Samples_t samples[10];
static std::uint16_t current;
static std::uint16_t temperature;
extern "C" void DMA1_Channel1_IRQHandler(void) /* DMA1 Channel 1 */
{
uint32_t tmp_current = 0U;
uint32_t tmp_temp = 0U;
if(LL_DMA_IsActiveFlag_HT1(DMA1))
{
LL_DMA_ClearFlag_HT1(DMA1);
for(uint32_t i = 0U; i < (sizeof(samples)/sizeof(samples[0])) / 2U; i++)
{
tmp_current += samples[i].current;
tmp_temp += samples[i].temperature;
}
}
else if(LL_DMA_IsActiveFlag_TC1(DMA1))
{
LL_DMA_ClearFlag_TC1(DMA1);
for(uint32_t i = (sizeof(samples)/sizeof(samples[0])) / 2U; i < (sizeof(samples)/sizeof(samples[0])); i++)
{
tmp_current += samples[i].current;
tmp_temp += samples[i].temperature;
}
}
else
{
/* error */
__asm("bkpt #0");
}
tmp_current /= ((sizeof(samples)/sizeof(samples[0])) / 2U);
tmp_temp /= ((sizeof(samples)/sizeof(samples[0])) / 2U);
current = (current + tmp_current) / 2U;
temperature = (temperature + tmp_temp) / 2U;
}
namespace ElektronischeLast
{
iADC::iADC(void)
{
/**ADC1 GPIO Configuration
PA0 ------> ADC1_IN0
PA1 ------> ADC1_IN1
*/
LL_GPIO_InitTypeDef GPIO_InitStruct =
{
.Pin = LL_GPIO_PIN_0,
.Mode = LL_GPIO_MODE_ANALOG,
.Pull = LL_GPIO_PULL_NO,
};
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_ADC1);
LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_HIGH);
LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MODE_CIRCULAR);
LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_NOINCREMENT);
LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_INCREMENT);
LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_HALFWORD);
LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_HALFWORD);
LL_DMA_SetPeriphAddress(DMA1, LL_DMA_CHANNEL_1, reinterpret_cast<std::uint32_t>(&ADC1->DR));
/* Select ADC as DMA transfer request */
LL_DMAMUX_SetRequestID(DMAMUX1, LL_DMAMUX_CHANNEL_0, LL_DMAMUX_REQ_ADC1);
/* Set DMA transfer addresses of source and destination */
LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_1,
LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
(uint32_t)&samples, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
/* Set DMA transfer size */
LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_1, sizeof(samples)/(sizeof(uint16_t)));
/* Enable DMA transfer interruption: transfer complete */
LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1);
/* Enable DMA transfer interruption: half transfer */
LL_DMA_EnableIT_HT(DMA1, LL_DMA_CHANNEL_1);
/* Enable DMA transfer interruption: transfer error */
LL_DMA_EnableIT_TE(DMA1, LL_DMA_CHANNEL_1);
/* Enable the DMA transfer */
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
/** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
*/
LL_ADC_InitTypeDef ADC_InitStruct =
{
.Clock = LL_ADC_CLOCK_SYNC_PCLK_DIV2,
.Resolution = LL_ADC_RESOLUTION_12B,
.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT,
.LowPowerMode = LL_ADC_LP_MODE_NONE,
};
LL_ADC_Init(ADC1, &ADC_InitStruct);
LL_ADC_REG_SetSequencerConfigurable(ADC1, LL_ADC_REG_SEQ_CONFIGURABLE);
/* Poll for ADC channel configuration ready */
while (LL_ADC_IsActiveFlag_CCRDY(ADC1) == 0)
{
}
/* Clear flag ADC channel configuration ready */
LL_ADC_ClearFlag_CCRDY(ADC1);
LL_ADC_REG_InitTypeDef ADC_REG_InitStruct =
{
.TriggerSource = LL_ADC_REG_TRIG_EXT_TIM1_TRGO2,
.SequencerLength = LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS,
.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE,
.ContinuousMode = LL_ADC_REG_CONV_SINGLE,
.DMATransfer = LL_ADC_REG_DMA_TRANSFER_UNLIMITED,
.Overrun = LL_ADC_REG_OVR_DATA_PRESERVED,
};
LL_ADC_REG_Init(ADC1, &ADC_REG_InitStruct);
LL_ADC_SetOverSamplingScope(ADC1, LL_ADC_OVS_DISABLE);
LL_ADC_SetTriggerFrequencyMode(ADC1, LL_ADC_CLOCK_FREQ_MODE_HIGH);
LL_ADC_REG_SetTriggerEdge(ADC1, LL_ADC_REG_TRIG_EXT_RISING);
LL_ADC_SetSamplingTimeCommonChannels(ADC1, LL_ADC_SAMPLINGTIME_COMMON_1, LL_ADC_SAMPLINGTIME_12CYCLES_5);
/* Enable ADC internal voltage regulator */
LL_ADC_EnableInternalRegulator(ADC1);
/* Delay for ADC internal voltage regulator stabilization. */
/* Compute number of CPU cycles to wait for, from delay in us. */
/* Note: Variable divided by 2 to compensate partially */
/* CPU processing cycles (depends on compilation optimization). */
/* Note: If system core clock frequency is below 200kHz, wait time */
/* is only a few CPU processing cycles. */
uint32_t wait_loop_index;
wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10);
while(wait_loop_index != 0)
{
wait_loop_index--;
}
/** Configure Regular Channel
*/
LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_0);
LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_0, LL_ADC_SAMPLINGTIME_COMMON_1);
/** Configure Regular Channel
*/
LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_2, LL_ADC_CHANNEL_1);
/* Poll for ADC channel configuration ready */
while (LL_ADC_IsActiveFlag_CCRDY(ADC1) == 0)
{
}
/* Clear flag ADC channel configuration ready */
LL_ADC_ClearFlag_CCRDY(ADC1);
LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_1, LL_ADC_SAMPLINGTIME_COMMON_1);
LL_TIM_InitTypeDef TIM_InitStruct =
{
.Prescaler = 32,
.CounterMode = LL_TIM_COUNTERMODE_UP,
.Autoreload = 490,
.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1,
.RepetitionCounter = 0,
};
LL_TIM_Init(TIM1, &TIM_InitStruct);
LL_TIM_DisableARRPreload(TIM1);
LL_TIM_SetClockSource(TIM1, LL_TIM_CLOCKSOURCE_INTERNAL);
LL_TIM_SetTriggerOutput(TIM1, LL_TIM_TRGO_RESET);
LL_TIM_SetTriggerOutput2(TIM1, LL_TIM_TRGO2_UPDATE);
LL_TIM_DisableMasterSlaveMode(TIM1);
LL_ADC_StartCalibration(ADC1);
while(LL_ADC_IsCalibrationOnGoing(ADC1))
{
}
LL_ADC_Enable(ADC1);
LL_ADC_REG_StartConversion(ADC1);
LL_TIM_EnableCounter(TIM1);
/* DMA1_Channel1_IRQn interrupt configuration */
NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
NVIC_EnableIRQ(DMA1_Channel1_IRQn);
}
iADC::~iADC(void)
{
}
}

22
Source/ADC.hpp Normal file
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@ -0,0 +1,22 @@
/*
* ADC.hpp
*
* Created on: Jul 1, 2023
* Author: Carst
*/
#ifndef ADC_HPP_
#define ADC_HPP_
namespace ElektronischeLast
{
class iADC
{
public:
iADC(void);
~iADC(void);
private:
};
}
#endif /* ADC_HPP_ */

9
Source/ElektronischeLast.cpp
View File

@ -6,10 +6,13 @@
*/
#include <cstdint>
#include <cstdio>
#include <stm32g0xx.h>
#include "STM32G071KBT6.hpp"
#include "LED.hpp"
#include "DAC.hpp"
#include "ADC.hpp"
#include "serial.hpp"
using namespace ElektronischeLast;
@ -575,15 +578,19 @@ static const std::uint16_t wave[] = {
int main (void)
{
__enable_irq();
serial_init();
LED led = LED(500U);
iDAC dac = iDAC();
iADC adc = iADC();
std::uint32_t dac_value = 0U;
printf("Init done\r\n");
while(1)
{
led.blink();
dac.write(iDAC::CHANNEL_1, wave[dac_value]);
dac_value = (dac_value + 1U) % (sizeof(wave)/sizeof(std::uint16_t));
dac_value = (dac_value + 1U) % (sizeof(wave)/sizeof(wave[0]));
}
}

13
Source/STM32G071KBT6.cpp
View File

@ -12,6 +12,9 @@
#include <stm32g0xx_ll_system.h>
#include <stm32g0xx_ll_utils.h>
#include <stm32g0xx_ll_gpio.h>
#include <stm32g0xx_ll_tim.h>
extern "C" void Reset_Handler(void);
extern "C" void NMI_Handler(void);
extern "C" void HardFault_Handler(void);
@ -51,6 +54,8 @@ extern "C" void USART3_4_LPUART1_IRQHandler(void); /* USART3, USART4 and L
extern "C" void CEC_IRQHandler(void); /* CEC */
extern std::uint32_t _estack;
const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL};
const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL};
std::uint32_t systick;
const std::uintptr_t interruptVectorTable[] __attribute__((section(".isr_vector")))
@ -155,7 +160,7 @@ extern "C" void EXTI0_1_IRQHandler(void){} /* EXTI Line 0 and 1
extern "C" void EXTI2_3_IRQHandler(void){} /* EXTI Line 2 and 3 */
extern "C" void EXTI4_15_IRQHandler(void){} /* EXTI Line 4 to 15 */
extern "C" void UCPD1_2_IRQHandler(void){} /* UCPD1, UCPD2 */
extern "C" void DMA1_Channel1_IRQHandler(void){} /* DMA1 Channel 1 */
extern "C" void DMA1_Channel2_3_IRQHandler(void){} /* DMA1 Channel 2 and Channel 3 */
extern "C" void DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler(void){} /* DMA1 Channel 4 to Channel 7, DMAMUX1 overrun */
extern "C" void ADC1_COMP_IRQHandler(void){} /* ADC1, COMP1 and COMP2 */
@ -232,11 +237,17 @@ extern "C" void SystemInit(void)
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(64000000);
/* Clock-Sources*/
LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1);
LL_RCC_SetTIMClockSource(LL_RCC_TIM1_CLKSOURCE_PCLK1);
/* Enable Clocks for all Peripherals*/
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOC);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPUART1);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DAC1);
}

62
Source/serial.cpp
View File

@ -6,6 +6,8 @@
*/
#include <cstdint>
#include <sys/stat.h>
#include <stm32g0xx_ll_gpio.h>
#include "stm32g0xx_ll_lpuart.h"
extern "C" int _write(int file, char *ptr, int len)
@ -54,6 +56,19 @@ extern "C" int _read(int file, char *ptr, int len)
#endif
}
extern "C" int _fstat(int file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
extern "C" int _isatty(int file)
{
(void)file;
return 1;
}
extern "C" void USART3_4_LPUART1_IRQHandler(void)
{
if(LL_LPUART_IsActiveFlag_RXNE_RXFNE(LPUART1))
@ -62,3 +77,50 @@ extern "C" void USART3_4_LPUART1_IRQHandler(void)
}
}
extern "C" void serial_init(void)
{
/**LPUART1 GPIO Configuration
PA2 ------> LPUART1_TX
PA3 ------> LPUART1_RX
*/
LL_GPIO_InitTypeDef GPIO_InitStruct =
{
.Pin = LL_GPIO_PIN_2,
.Mode = LL_GPIO_MODE_ALTERNATE,
.Speed = LL_GPIO_SPEED_FREQ_LOW,
.OutputType = LL_GPIO_OUTPUT_PUSHPULL,
.Pull = LL_GPIO_PULL_NO,
.Alternate = LL_GPIO_AF_6,
};
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_3;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
LL_LPUART_InitTypeDef LPUART_InitStruct =
{
.PrescalerValue = LL_LPUART_PRESCALER_DIV1,
.BaudRate = 115200,
.DataWidth = LL_LPUART_DATAWIDTH_8B,
.StopBits = LL_LPUART_STOPBITS_1,
.Parity = LL_LPUART_PARITY_NONE,
.TransferDirection = LL_LPUART_DIRECTION_TX_RX,
.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE,
};
LL_LPUART_Init(LPUART1, &LPUART_InitStruct);
LL_LPUART_SetTXFIFOThreshold(LPUART1, LL_LPUART_FIFOTHRESHOLD_1_8);
LL_LPUART_SetRXFIFOThreshold(LPUART1, LL_LPUART_FIFOTHRESHOLD_1_8);
LL_LPUART_EnableFIFO(LPUART1);
LL_LPUART_Enable(LPUART1);
/* LPUART1 interrupt Init */
NVIC_SetPriority(USART3_4_LPUART1_IRQn, 2);
NVIC_EnableIRQ(USART3_4_LPUART1_IRQn);
/* Polling LPUART1 initialisation */
while((!(LL_LPUART_IsActiveFlag_TEACK(LPUART1))) || (!(LL_LPUART_IsActiveFlag_REACK(LPUART1))))
{
}
}

13
Source/serial.hpp Normal file
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@ -0,0 +1,13 @@
/*
* serial.hpp
*
* Created on: Jul 1, 2023
* Author: Carst
*/
#ifndef SERIAL_HPP_
#define SERIAL_HPP_
extern "C" void serial_init(void);
#endif /* SERIAL_HPP_ */